FPGA Breakout Design Decisions

To get to my goal of a DSP-based ham radio using an FPGA as the DSP, I first need a way to prototype with an FPGA. Available FPGAs all use modern, small packages such as QFNs, QFPs, and BGAs. I can’t imagine soldering wires directly to a hundred tiny pins, so “dead-bug” construction, with the chip upside-down on a piece of copperclad board, is out. I need a breakout PCB that holds the chip and brings out its pins to something more reasonable to work with.

To get to my goal of a DSP-based ham radio using an FPGA as the DSP, I first need a way to prototype with an FPGA.  Available FPGAs all use modern, small packages such as QFNs, QFPs, and BGAs.  I can’t imagine soldering wires directly to a hundred tiny pins, so “dead-bug” construction, with the chip upside-down on a piece of copperclad board, is out.  I need a breakout PCB that holds the chip and brings out its pins to something more reasonable to work with.

I don’t know exactly where the project will lead me, so the breakout board should have minimal predetermined functionality.  One key problem is power.  I have no idea how much power, at various voltages, the radio will need.  Much depends on how intense the DSP algorithms are, what clock rate is used, and how much load the FPGA outputs need to drive.  Besides, power supplies are easy to prototype over copperclad board.  Therefore, the adapter should not include power supplies.

After looking around at the market and not finding anything fitting my needs, I decided to design my own adapter.  I settled on the following requirements:

  • The adapter will be designed to sit directly on a groundplane, so it integrates well  with skywired circuitry.
  • Despite wanting to leave as many pins as possible free, I decided to include a USB  interface, which requires three pins if used with the OpenCores USB 1.1 MAC and USB 1.1 PHY.
  • The FPGA I chose needs an external reset source for user logic (it has a built-in  power-on reset only for its internal circuitry), so I will include reset supervisors to  monitor key power rails.  The monitors will be strappable to any pin on the FPGA,  rather than hard-wiring them to a particular pin.
  • The adapter will include a connector for programming the FPGA.

The choice of FPGA was easier than defining the breakout board’s features.  I’ve worked with Actel (now Microsemi) FPGAs in the past, so I know the toolchain.  They use on-board flash to store their programs and are live at power up.  Their major competitors, Altera and Xilinx, are based on RAM and have to load their programs from an external EEPROM before they are functional.  Since I’m aiming for a low component count in the radio, it is appealing to be able to omit the EEPROM.  Best of all, Actel’s tools are priced right: Fully functional software is no-cost, and the programmer is inexpensive at $50.

Looking through Actel’s selection tables, I chose the A3PN250.  This FPGA has plenty of gates of logic (nominally 250,000) and it is in a reasonably small 100-pin QFN package.  I don’t know how many gates I will need, so it won’t hurt to start with a good-sized FPGA.  Actel make larger parts in QFP packages, up to 600K gates in a 208-pin QFP, as well as smaller parts, so there is a growth path up or down if needed.  The A3PN250 is reasonably priced and readily available from Mouser.

The Actel/Microsemi parts have one additional advantage: They have the best static power consumption in the industry.  That isn’t a feature I’m planning to use when doing DSP, but it’s something to keep in mind for other applications.

Now that I have an idea of my requirements and I’ve picked the key component, it’s time to get to designing.  Next up will be the schematic for the FPGA breakout board!