FDIM 2012: WB9LPU’s QuadraBug fully automatic key

This year’s Four Days in May at the Dayton Hamvention was full of sights to see. One amazing little piece of amateur engineering was Rich Meiss, WB9LPU’s “QuadraBug”, a mechanical key in the spirit of the Vibroplex Bug, but with fully automatic keying of both dits and dahs. (A bug has automatic dits, but manual dahs.)

Tom Perrera has put together a nice overview of Rich’s keys, starting from simple straight keys and working up to novel automatic keys like this.

My mechanical skills are limited. I have a lot of respect for those who can imagine and construct fine machines like this.

A Morse code keyer in VHDL

I found another FPGA Morse code keyer project! This one is written in VHDL by Jim Brady. He has posted the source (for a Xilinx Spartan 3A).  He also posted his vintage keyer designs from the 1960’s and 1970’s.

Jim’s design is not iambic, but does have dot and dash memory. Speed adjustment is done via an RS-232 serial link to a PC.

If VHDL is your hardware language of choice, or if just would like another take on Morse keying, Jim’s keyer is worth a look.  Of course, if you’re interested in a small iambic keyer core in Verilog, have a look at the skywired.net iambic keyer.

Update 8/8/11: Jim tipped me off to another VHDL keyer published online. This one is designed for a Cypress CPLD and is written in VHDL. It’s on pages 53-73 of Circuits I Have Known, by Ronald W. Parker. A PDF is available at controlsignalconverter.com, and the book itself is available at Amazon.

The iambic keyer core is alive

With just a few tweaks, I brought up the “IambicV” iambic keyer core on one of my A3PN250 breakout boards. I was stunned when it made dits, dahs, and iambic dah-dits perfectly the first time out. Yes, I know that’s what a testbench is supposed to make possible, and yes, I’ve had it happen before, but I still always expect smoke the first time I turn something on.

I made a few changes from last week’s version. One change was to invert the dit and dah pins. Although high-true logic is convenient within the keyer module, it seems like a good idea to have the actual paddles grounded, so the inputs had to be low-true. The physical constraints file enables the built-in pull-up resistors on the dit and dah pins.

For an audio amplifier, I used an old Saint Louis QRP Society LM380 board.

It’s all lashed together on my bench, but it works.

To download the core, see the iambic keyer project page.

Iambic keyer in Verilog

If my goal is to build an FPGA-based ham radio, one of the modules I can’t do without is an iambic keyer. I have to confess that I have never been much of a CW (Morse code) operator, but with so many logic gates available, it would be a shame to leave out a keyer.

The basic idea behind an iambic keyer is to use a two-lever “paddle” to send Morse code. Pressing one paddle, usually with the thumb, sends a series of dits (dots), and pressing the other paddle, usually with the index finger, sends dahs (dashes). Squeezing both paddles alternates between dits and dahs. The didahdidahdidah… sound of squeezing the paddles sounds a bit like the iambic feet of English poetry, hence the name “iambic keyer”. If Shakespeare were a Morse code operator, one of his sonnets might include the sweet iambic pentameter “didahdidahdidah, didah didah!”

Writing an iambic keyer turned out to be a good way to get the kinks out of the FPGA toolchain. The code itself is pretty simple and straightforward. One flip-flop keeps track of whether the current symbol is a dit or a dah. Another tracks whether the paddle for the opposite symbol (dah or dit, respectively) has been pressed during the current symbol. Finally, a two-level counter handles the timing of the dits and dahs and operates the key line. There is a simple sidetone, too. Continue reading Iambic keyer in Verilog