If my goal is to build an FPGA-based ham radio, one of the modules I can’t do without is an iambic keyer. I have to confess that I have never been much of a CW (Morse code) operator, but with so many logic gates available, it would be a shame to leave out a keyer.
The basic idea behind an iambic keyer is to use a two-lever “paddle” to send Morse code. Pressing one paddle, usually with the thumb, sends a series of dits (dots), and pressing the other paddle, usually with the index finger, sends dahs (dashes). Squeezing both paddles alternates between dits and dahs. The didahdidahdidah… sound of squeezing the paddles sounds a bit like the iambic feet of English poetry, hence the name “iambic keyer”. If Shakespeare were a Morse code operator, one of his sonnets might include the sweet iambic pentameter “didahdidahdidah, didah didah!”
Writing an iambic keyer turned out to be a good way to get the kinks out of the FPGA toolchain. The code itself is pretty simple and straightforward. One flip-flop keeps track of whether the current symbol is a dit or a dah. Another tracks whether the paddle for the opposite symbol (dah or dit, respectively) has been pressed during the current symbol. Finally, a two-level counter handles the timing of the dits and dahs and operates the key line. There is a simple sidetone, too.
The keyer has dot and dash insertion. In other words, it is not necessary to have precision timing to insert a dit into a stream of dahs. Instead, tapping the dit paddle any time during a dah will cause one dit to be inserted before the next dah. The same goes for dahs in a stream of dits.
I wrote it to support both mode A and mode B keying. The difference lies in how the keyer acts if both paddles were squeezed and then both are released. A mode A keyer will not complete the iamb, following a dit with a dah or vice versa, while a mode B keyer will. I have only used mode B before this, so I am not sure I implemented mode A correctly. If you are like mode A iambic keying and give this a try, I would love some feedback on whether it is right.
The Verilog code passes the testbench and synthesizes, but I ran out of weekend before I had time to try it on the real hardware. A future post will let you know how it works.
Without further ado, here it is: IambicV, an iambic keyer in Verilog (work in progress)
IambicV is licensed under the GNU General Public License.