Building the AK5388 ADC breakout board

“Honey, the package you’ve been waiting for from Hong Kong is by your computer,” said my dear wife shortly after I got home from work on Friday. Even better, a few minutes later she suggested that I spend the evening in the basement, building up one of my new boards. I have a wonderful wife!

The AK5388 ADC breakout boards finally arrived!  I had a hard time waiting for them. First, Itead Studio didn’t ask me to correct the design until the day the finished boards were supposedly going to ship. (They did apologize for the delay — it sounded like there was a communications snafu between them and the fab.) Then I waited five more days for the board to be fabbed. Shipping from Hong Kong to Ohio took ten days. Looking around on the web, I’ve seen shipping times reported from seven to ten days, sometimes going up to as much as 20 days during the holiday season.

All eight boards look great. Other people who tried Itead reported some over-etching and silkscreen problems, but I don’t see any defects on mine. Since Itead now does 100% electrical testing, I have confidence that the boards will all work. I could spot the tiny dimple in each pad where the flying probes touched down, so it is clear that all eight boards were tested.

I went to the basement and heated up the soldering iron. The board went together easily. The 0.80 mm pitch of the AK5388 was downright easy to solder after the 0.50 mm  A3PN250 FPGA and other fine-pitch parts I’ve been using at work. Besides, I’ve learned some new soldering techniques lately that helped me solder the AK5388 quickly, but I’ll have to share those in another post. I did use a meter to check all of my AK5388 solder joints, though. There were a few bridges, but they cleaned up without a problem.

The pads for the big electrolytic capacitors are larger than necessary. I used PCB’s default EIA7343 footprint. The pads had plenty of room for the soldering iron, but they could have been smaller without sacrificing ease of assembly. (Did I use the wrong footprint once again? 0805 capacitors seem to be the only ones I get along with…)

Lately Digi-Key has been taking much stronger steps to control moisture uptake by the semiconductors they sell. Instead of just shipping some cut tape in an anti-static baggie, they now seal the chips in an airtight bag with a packet of dessicant and a humidity indicator. I opened the bag this one was in about 4 weeks ago. Not bad so far, considering it was in my not-very-dry basement that whole time. Moisture uptake is important for reflow soldering techniques, but as far as I can tell, it is less significant for hand-soldering.

Now I’m left asking myself what comes next. In my original plan, the next step was to couple the ADC to the FPGA, put a USB core on the FPGA, and build a sound card. Once that works, adding a local oscillator and a quadrature mixer will make everything I need for a PC-based software-defined-radio (SDR) receiver, and this long trek will finally result in a radio.

However, I hear that the bands are great these days, and I’m not sure I want to take the time to homebrew an SDR rig just to get on the air. Maybe I should spend some time on a faster route to a radio, then come back to the SDR. I’ll probably have more on that idea next week.

Until then, keep on tinkering, and as always, your comments are welcome!

Trying out Itead Studios’s PCB prototyping service

I’m working on building a breakout board for the high-performance AK5388 audio ADC. In my last post, I revised the schematic to help with the PCB layout and test-fit the key components on a printout of the board.

The next step was to order the board. Laen’s PCB order is taking a hiatus this month. Feeling impatient, I decided to try one of the Chinese options: Seeed Studio’s or Itead Studio’s PCB fab services. They offer prices as low as $9.95 for 10 copies of a 5 cm x 5 cm board. Unfortunately, the ADC board is 4.9 cm x 6 cm. That extra centimeter nearly doubled the cost of the board, because I had to buy a 5 cm x 10 cm package. At least one dimension was still below 5 cm!

My son wandered in while I was comparing prices. He asked, “Is your circuit board going to be purple?”  I told him that no, it was probably going to be green.  “I think it should be red!” he said.  “What the heck,” I thought, and clicked on the button for Itead’s color PCB service. The deal was $23 for 8 boards. That compares with $18 for 10 boards if they are green. Since both 8 and 10 boards are more than I need, it’s basically $5 extra for the custom color. I went for it.

For what it’s worth, one difference between Itead and Seeed is that Seeed only offers 50% electrical testing for their base prices, with 100% testing costing more. Itead has 100% e-test with their base prices. Itead and Seeed are having a bit of a price war over these PCB services, so their offers may well have changed by the time you read this.

Itead is offering an interesting bonus deal with their PCB services: PCB sharing. For a token 10 cents above the cost of the PCB service, they will send me two random boards from other designers. In exchange, they will send two additional copies of my board to other sharing participants. There is no guarantee the boards will be remotely useful to the recipient, but for 10 cents, how could I resist?

(By the way, if you’re reading this because you saw the skywired.net URL on a board Itead sent you, please drop me a note! I’d love to hear who you are and what you’re working on.)

I expected roughly a five day turnaround from Itead, and was disappointed when after five days, I received an e-mail that the fab had rejected my Gerber files. Itead wants the board outline on at least one Gerber layer. Now, both Laen and Sparkfun’s BatchPCB accepted the groundplanes on my boards as the outline, so I didn’t expect trouble from Itead. However, they were certainly within their rights to ask me for a correction. It was quick to add it, and a few hours later they told me my new Gerbers had been sent to the fab.

I’m still waiting for the PCBs, which were shipped Wednesday. Now I have to wait for them to come by airmail from Hong Kong. It’s hard to be patient!

AK5388 ADC breakout board update

For the last month or two, a breakout board for the AKM Semiconductor AK5388 analog-to-digital converter has been my main project. Here’s an update on where it stands.

When I last posted about the board, I was waiting for parts to arrive so I could check their fit on a printout of the PCB. After the capacitor footprint error on the FPGA breakout board, I was feeling a bit cautious. The parts arrived and fit fine!  I checked out the ADC on its QFP footprint, and it was perfect. Then I tried the big capacitors on their EIA 3216 footprints, and those were fine, too.

Fixing the schematic

AK5388 breakout board schematic, revision B

I ran into some problems with the schematic when I did the PCB layout. One problem was that multiple pads named “GND” or “DVDD” were consolidated into one. A second problem was that the names I had assigned the pads were not visible in PCB, meaning I was in for a slow process of finding each one on the schematic in order to add the right label to the PCB’s silkscreen. I found a great solution, though.

The fix to both problems was to name the nets, not the pads. I restored all the pads to their boring PAD1, PAD2, … reference designators and named the schematic nets after the signals. Now, when I hovered the cursor over one of the pads in PCB, a little tooltip popped up and told me the net name connected to the pad, among other things. Labelling all of the pads took only a few minutes. I wish I had known about this trick when I did the A3PN250 FPGA board!

Secondly, using conventional reference designators to name the pads solved the problem with the DVDD and GND pads.

These changes resulted in the rev B schematic. A PNG version is above, and I’ll post the editable gschem version on the AK5388 breakout project page.

I have ordered the boards, and I will have more to say about that next week.

What do you think? Comments welcome!

PCB routing techniques for ADCs

PCB layout is fun, especially when you are trying to eke the best performance out of a component.  Last week, I finished the PCB layout for the AK5388 analog-to-digital converter (ADC) I chose for my digital ham radio transceiver project. Let’s take a closer look at some of the design details…

My top priority was to keep digital lines away from sensitive analog signals. The quickly-switching edges of digital signals carry lots of high-frequency components, which readily couple into any neighboring line. It’s best to keep this high-frequency crud away from quiet analog signals. It’s not great to let it couple instead into other digital lines, but digital inputs are pretty tolerant to it and rarely have problems.

AK5388 board with an overlay showing how the analog and digital sections are separate.

The AK5388 pinout helps a lot with this separation requirement. As is done in many ADCs, all of the digital pins are on one side of the chip, and all of the analog pins on the other. When laying out a mixed-signal board (that is, one that has  both analog and digital elements), I like to draw a line across the board before I even start to place the parts, with all analog components going on one side and all digital on the other. As the placement and routing progress, that line will move and may even change into a zig-zag, but the idea remains: Keep the analog stuff on one side and the digital on the other.

On the AK5388 breakout board, the analog-digital border remains a straight line. Everything in the top half of the board is analog, and everything in the bottom half is digital.

Another reason to have a clean split is the return currents and their IR drop. Remember that current flows in a loop. When any of those digital lines changes state, it charges a small capacitance at the other end, and the current used to do that charging flows back through the ground plane. At high frequencies, that return current is largely confined beneath the digital line that caused it. On top of that, the return current causes a voltage gradient underneath it, thanks to Ohm’s law and the resistance of ground. (V = IR)  This voltage gradient can act as an additive noise source on analog signals that are routed near it. The careful split in this board’s design will help keep the digital return currents from affecting the analog signals.

Another feature of the board is that it has local analog and digital power supplies for the ADC. The power supplies are located in their own area, again to try to limit noise caused by the return currents. In the picture below, the power supplies are highlighted in yellow.

The AK5388 breakout board with the power supply location highlighted.

The voltage regulators used here (uA78M33CDCY and uA78M05CDCY) are in SOT-233 packages, which have a large lead on one side to help with heatsinking.  The board is laid out with some extra copper area to act as a heat spreader for each SOT-223, along with a bunch of vias tying the top-side copper to the ground plane. These vias have a thermal role, not primarily an electrical one, as they help transfer heat from the top-side heat spreader down to the ground plane to further spread it out.

Although there are ways to estimate the thermal performance of a heat-spreader design like this, I didn’t do them. Frankly, I don’t have any idea whether this board’s thermal provisions are adequate. Even at the bargain price of $5/square inch to have this PCB fabbed, adding copper just for thermal management gets expensive. If the heat-spreading area turns out to be insufficient, I’ll find a way to attach a heatsink to the top side of the regulators, solder a piece of brass to their large lead, or something along those lines to remove the heat more efficiently.

Finally, take a look at the decoupling capacitors. C4, C7, C11, and C14 are 100 nF capacitors, each on one power-supply input to the ADC. They are positioned as close to the ADC as I could manage. One could argue that their positioning is not quite perfect because there is a relatively long path from their grounded side to the closest ADC ground pin. It goes through two vias and the ground plane. I have never looked into whether this makes a significant difference. If you know, leave a note in the comments and tell me!

In any case, the 100 nF capacitors are multi-layer ceramic capacitors (MLCC), which have a low equivalent series resistance (ESR) and inductance (ESL). Those characteristics make them ideal for decoupling high-frequency noise on the power supply lines.

Next, C2, C9, C22, and C23 are big 10 μF decoupling capacitors. These are positioned a little farther away. They are aluminum electrolytic capacitors, which have a higher ESR and ESL than ceramic caps. (10 μF ceramic capacitors are expensive!) These capacitors are better for removing low frequencies, including the audio range, from the power supplies. For that reason, I did not see much harm in putting them a little farther from the ADC, with the extra inductance and resistance that implies. Besides, these things are BIG! If they were any closer to the ADC, routing the signal lines in and out would get pretty challenging.

One trick for getting the decoupling capacitors closer is to put them on the back side of the board. The distance through a via would be much shorter than the distance needed here. I wanted a single-sided design here, so that wasn’t an option, but it’s something to keep in mind.

I won’t claim that I know everything about designing for a high-performance ADC. In fact, it’s possible that someone more experienced is planting their face in their palm right now, saying, “I can’t believe he did that!”  (If that’s you, by the way, drop me a note to let me know what the problem is, would you?)  That said, what I did here is based on app notes and other materials from a number of semiconductor companies, including Analog Devices and National Semiconductor, and I think it’s pretty sound.

I ordered the parts for this board today. It doesn’t take long for UPS to get things to Ohio from Digi-Key’s home in northernmost Minnesota, but it’s always a long wait when I’m itching to try something out.

I’ll catch you next week with more on electronics, DSP, and ham radio.

PCB layout for the AK5388 ADC breakout board

I had some time to myself this weekend and was able to get the AK5388 breakout board routed. The board carries an AKM AK5388 audio DAC, which has 24-bit output and up to a 123 dB signal-to-noise ratio. My plan is to build up this board, evaluate it to verify that it works as I expect, then use it as the ADC stage in a DSP-based ham radio receiver.

Moving the schematic from gschem to PCB was really easy. This was my first time using PCB’s “Import schematics” command. It was a breeze, especially compared to the old way of doing it, the gsch2pcb command. That command worked well enough, but I could never get it done without checking the documentation or a howto online. “Import Schematics” required no such thing. Bravo to the PCB developers!

As with the FPGA board, I laid out the board with a solid groundplane on the back and all components and traces on the front. That way, it can be placed on a piece of copperclad board, for skywired construction, without risk of shorts to ground. It’s also good for noise performance.

Photorealistic view of AK5388 breakout board, top side

The square chip in the middle (QFP, U1) is the AK5388. On the right edge are a 7833 and a 7805 voltage regulator, for the digital and analog power supplies, respectively. The board includes some heatsink area around the regulators (U2 and U3), with thermal vias to stitch the heatsink to the groundplane on the back. The rest of the components are decoupling capacitors, lots of decoupling capacitors, plus two resistors that also help control noise. A 24-bit ADC needs quiet power supplies!

As you might expect, the bottom side is kind of boring:

Photorealistic image of the bottom side of the AK5388 breakout board

That’s the ADC board so far. Although I have Gerber files now and could go order the boards, I’m going to order the parts first this time and test-fit them on a printout of the layout.

AK5388 audio ADC breakout board design

A few weeks ago, I picked the AKM Semiconductor AK5388 as the analog-to-digital converter for my receiver design. This high-performance audio DAC has a 24-bit output with up to 123 dB signal-to-noise ratio (A-weighted).  I hope that the narrower bandwidths of a communications receiver will beat that. The idea is to do the automatic gain control (AGC) in digital, so that the receiver will not need an analog AGC loop. I hope that a preamp or attenuator at the front end will be enough to make up for the limited dynamic range of the AGC.

Now, I am aware that getting performance like that requires great care in the details of the design and layout, but if this wasn’t a challenge, it wouldn’t be nearly as much fun!  The AK5388 datasheet does give me some concern, because it does not make much mention of the techniques needed for a high-performance DAC. Admittedly, datasheets from Japanese manufacturers are often thinner on details than those from the leading US suppliers, and this one is much more complete than some. On the other hand, it may be that the datasheet is glossing over any coddling this chip will need.

There is one way to find out, and that is to start breadboarding. This is a surface-mount part, so I have designed a breakout board very much like the board I built for the Actel Microsemi A3PN250 FPGA. The schematic is below.

AK5388 ADC Breakout Board schematic

The schematic largely follows the “System Design” section of the datasheet and the example of the AKD5388-A evaluation kit (PDF). It’s not strictly a breakout because I included on-board analog and digital power supplies. An ADC like this needs quiet, local power, so I picked some reasonably quiet supplies and put them on-board. I chose 7800-family regulators from TI because they have reasonable noise specifications. I almost went with other choices that were explicitly designed for low noise, but they were quite a bit more expensive for not much less noise. The AKD5388-A kit uses an uA78M05 and claims to be able to obtain the full dynamic range of this ADC, so there is little reason to spend more at this point.

I’m using the analog power supply as the voltage reference. I considered a dedicated reference, which would be more expensive but perhaps lower noise. Here, too, I followed the lead of the evaluation kit.

The PCB layout should be straightforward. I like to build by skywiring components over a groundplane, so this breakout board will be designed to sit directly on a groundplane, with all components and connections on the top side. All external wiring points will be pads on the PCB, ready for soldering, just as with the A3PN250 FPGA board.

I’m excited about trying out this part. What do you think? Comments welcome!

Choosing a high-performance audio ADC

As I discussed two weeks ago, it is time to refocus my efforts on the DSP-based ham radio project that started this blog. Let’s take a look at the architecture I had in mind originally:

Block diagram of a near-zero IF receiver with I and Q paths

This is a popular topology for radios that put their intermediate frequency at or near 0 Hz. It is also very similar to the most popular ham software-defined radio topology. In fact, those ham SDRs simply substitute a PC sound card for the ADC and the PC’s CPU for the FPGA. Here, though, I don’t want to bring a PC into the picture yet. Radios that require a PC don’t feel like “real radios” to me. I want to end up with a self-contained box, though I won’t mind if it optionally integrates with a PC.

For simplicity, I want to implement the receiver’s automatic gain control (AGC) functional digitally, after the ADCs. This means that with a well-designed front end, the ADC dynamic range will become the radio’s dynamic range.

With that in mind, I went looking for the best dynamic range audio ADC I could find, or at least the best one I could afford. I have identified seven manufacturers of 24-bit audio ADCs. Here is the best that they have:

Part SNR, A-weighted THD+N Package Price
TI PCM4222 123 dB -108 dB TQFP-48 $29.99 D*
TI PCM4220 123 dB -108 dB TQFP-48 $19.10 M
AKM AK5388 123 dB (Note 1) -110 dB LQFP-44 $10.93 D
AKM AK5394A 123 dB -110 dB SOP-28 $22.00 D
Cirrus CS5381 120 dB -110 dB SOIC-24, TSSOP-24 $32.22 D/M
Wolfson WM8786 111 dB -102 dB SSOP-20 $3.48 M
ADI AD1974 105 dB -96 dB LQFP-48 $10.03 D
NXP UDA1361 100 dB -88 dB SSOP-16 $1.37 M
Notes: 

Figures are typical values as shown in the manufacturer’s data sheet. All are for two channels active and 24-bit PCM output. Prices are quantity 1 from the cheaper of Digi-Key or Mouser.

1. The AK5388 is a four-channel ADC with 120 dB SNR. The 123 dB SNR requires the use of “mono mode”, which connects each stereo pair in parallel with a single input, effectively creating a two-channel ADC with 3 dB better SNR.

* Non-stock item, but a limited number of units are currently in stock.

The AK5388 looks like the price/performance winner, at $10.93 for 123 dB SNR and the best THD+N. One catch is figuring out the mono mode, which didn’t have crystal-clear documentation in the data sheet. On the other hand, even in four-channel mode it has 120 dB SNR, which still puts it at an excellent price/performance point.

Lurking in the SNR specification is A-weighting, which is a specification used for audio that isn’t much seen in the measurement world. The idea behind A-weighting is to reflect the human ear’s varying perception of noise at different frequencies by doing a weighted sum of the noise in the SNR measurement. Thus, frequencies where noise is more audible count worse than frequencies where it isn’t. A-weighting is not quite the right measurement for a near-zero IF ADC, first because a communications receiver’s bandwidth is quite a bit smaller than the 20 kHz used for the A-weighted measurement, and second because the communications signal being digitized is not necessarily at its final audible frequency yet.

I used A-weighting for the comparison because all of the ADCs were specified that way. Some of them also had an SNR in 20 kHz bandwidth specification, which does not weight the noise spectrum. For those ADCs, the 20 kHz SNR was 3 dB lower than the A-weighted SNR. , I decided to compare the A-weighted SNR to put the ADCs on equal ground, even though the 20 kHz bandwidth SNR is closer to what I would like to know for a communications receiver.

It’s worth mentioning that I looked at precision ADCs as well. I couldn’t find any 24-bit precision ADCs from Analog Devices or Linear Technologies that had a high-enough sample rate to be usable. In contrast, TI offers the single-channel ADS1281 and ADS1282, which offer a stunning 130 dB SNR (unweighted) at 250 samples per second. These might be reasonable for a Morse code receiver with a 100 Hz passband. When used for sideband, these ADCs would have to be operated in their 4000 SPS mode, at which their SNR drops to 118 dB. When one considers that filtering the output of the audio ADCs down to 100 Hz would provide an extra 6+ dB of SNR (because less bandwidth means less noise power), the ADS1281/1282 no longer has such an advantage. Worse, a pair of ADS1281 (two are needed because they are single-channel) will set you back $108 at Digi-Key.

In the end, I’ve found a combination of excellent performance and a good price. The AK5388 it is. The next step is to build or buy a board for it so I can start experimenting.

How Delta-Sigma Works, part 2: The Anti-Aliasing Advantage

This post is part of a series on delta-sigma techniques: analog-to-digital and digital-to-analog converters, modulators, and more. A complete list of posts in the series are in the How Delta-Sigma Works tutorial page.

Today, let’s take another look at delta-sigma conversion.  The first part of this series showed how a one-bit, first-order delta-sigma modulator creates a bitstream, the average value of which equals the input voltage.  It turns out that how we find that average value makes a big difference in the performance of a delta-sigma analog-to-digital converter.  In fact, if done right, not only does it improve performance, but it greatly simplifies the analog circuitry preceding the A-to-D.  Let’s take a look at why this works!

Aliasing Explained

One phenomenon that happens with any analog-to-digital conversion is known as aliasing.  A-to-D is inherently a sampling process, in which an analog signal that is continuous in time is converted to a digital signal that exists in discrete chunks, or samples.  The rate at which those samples are taken is known as the sampling rate.  The figure below shows three analog sine waves, in red, being sampled at the times marked with the blue vertical lines.  The top sine wave has a frequency of 1 Hz, and it is being sampled at 7 Hz.  (The seventh sample is not obvious, because it is zero and the left- hand or the right-hand edge of the graph.  Which edge you choose is unimportant.)

A frequency above the sampling rate results in aliasing to a lower frequency

The second and third plots in the figure show aliasing in action.  When any signal with a frequency above one-half the sampling rate is sampled, the signal is <i>aliased</i> down to a frequency between 0 Hz and one-half the sampling rate.  The second line shows a 6 Hz sine wave in red, which is being sampled at 7 samples per second (sps).  The blue lines show where the samples fall.  Because 6 Hz is above 3.5 sps (one half of 7 sps), the sine wave will be aliased.  As you can see, the blue samples are identical to those you see in the top trace, except that they have the opposite polarity.  The dark blue trace connects them and shows that a 6 Hz sine wave is indistinguishable from a 1 Hz sine wave when both are sampled at 7 sps.  That is aliasing in action.

The same process happens for any input frequency above one-half the sampling rate.  The third plot in the figure, for example, shows an 8 Hz sine wave.  Again, it is sampled at 7 Hz.  This time the samples are identical to those in the top line.  The sampled waveform (in dark blue once again) is indistinguishable from the sampled version of our original 1 Hz sine wave.

Aliasing is so important that one-half the sampling rate has become known as the “Nyquist frequency” for a system.  You may see people refer to signals as being “above Nyquist” or “below Nyquist”.  Aliasing happens in a repeated pattern as the frequency rises, and each repetiion of that pattern is called a “Nyquist zone”.  All of this is in memory of Harry Nyquist (1889-1976), who with Claude Shannon discovered much of the mathematics behind sampling.

Because of aliasing, analog-to-digital converters are usually preceded by an anti-aliasing filter.  This filter removes the frequency content outside of the desired Nyquist zone, so that noise and interfering signals do not alias into the passband of the ADC.  Most often, a low-pass filter is used, so that the selected Nyquist zone runs from DC (0 Hz) to 1/2 the sampling frequency.  There are some exotic RF applications in which a bandpass filter selects frequencies in a higher Nyquist zone, which the ADC then aliases down, but these are uncommon.

An anti-aliasing filter before an ADC input.

How Oversampling Makes Anti-Aliasing Easier

In order to get good accuracy, delta-sigma converters need to run at a much higher frequency than the input signal.  The first part of this series introduced an idea for an ADC built from a delta-sigma modulator followed by a digital counter:

Conceptual delta-sigma analog-to-digital converter

For this to work, the delta-sigma modulator has to <i>oversample</i>.  In order to have the counter reflect the input signal accurately, there have to be many 1 and 0 bits in the modulator’s output for the counter to count.  In other words, each sample from the counter’s output has to reflect many samples in the modulator.  This is called oversampling.

The nice thing about oversampling is that the Nyquist frequency goes up with the sample rate, even when oversampling!  The classic example of this happens in CD audio systems.  CDs carry audio signals of up to 20 kHz, with a 44.1 ksps sample rate and a Nyquist frequency of 22.05 kHz.  Furthermore, CD audio has a dynamic range of about 97 dB.  In order to avoid aliasing signals back into the 0 Hz – 20 kHz audio band, the antialiasing filter at the input of a CD audio ADC needs to have a rolloff frequency (-3 dB) at 20 kHz, and should be down to -97 dB by 24.1 kHz.  This is an impractical filter to design and build.

However, if an oversampled delta-sigma ADC is used, then the Nyquist frequency goes up to one-half the oversampled sample rate.  A typical choice might be 64x oversampling, in which case the ADC will sample at 2.8224 MHz.  Then the Nyquist frequency is 1.4112 MHz.  The anti-aliasing filter still needs to have its -3 dB rolloff at 20 kHz, but it does not need to be -97 dB down until 2.82 MHz.  That is a much easier filter to design.  In fact, a 3-pole filter, easily and cheaply implemented with an op amp, is sufficient.

Moving Anti-Aliasing to the Digital Domain

To go from 2.8 Msps to 44.1 ksps requires another round of sampling, this time in the digital domain.  Remember the counter?  The process of reading its count, then resetting it for another round of counting, is a form of sampling, and aliasing can result.  The figure below shows an example.  In this case, an 8 Hz sine wave is being sampled at 70 sps by an oversampling ADC.  Then, that digital signal is being downsampled, by taking every tenth sample, to 7 sps.  The result is that the 8 Hz input is aliased to 1 Hz, just as if it was sampled at 7 sps in the first place.

Aliasing can result from downsampling a digital signal.

Just as in the analog domain, there are times when the aliasing resulting from downsampling can be useful, but often it is not.  To prevent it, we need a low-pass filter, but this time the filter can be digital.  In the CD-audio example, the filter needs to have the same rolloff characteristics as the challenging analog filter (-3 dB at 20 kHz, and -97 dB at 24.1 kHz).  Doing that in a digital filter, though, is much easier than in analog.  Digital arithmetic can produce a filter of arbitrarily good performance, without the precision components or careful tuning adjustments that might be required in analog.  All it takes is throwing enough logic gates at the problem, and thanks to Moore’s Law, logic gates are cheap.

Since low-pass filters have an averaging effect, the filter will turn the bitstream of 1’s and 0’s into a series of multi-bit samples.  The counter becomes unnecessary.  Instead, it is enough to keep one sample from the low-pass filter’s output every so often, discarding the rest.  The ADC now looks like this.  (A simple anti-aliasing filter before the input is needed, but not shown.)

A delta-sigma ADC with a low pass filter and downsampler

The figure below shows the principle.  A 1 Hz sine wave is oversampled at 70 Hz in the top graph, then 9 out of every 10 samples are discarded, leaving only the highlighted ones.  Those samples are plotted in the bottom graph.  The result is identical to the sine wave samples in the first graph at the top of this article.

Downsampling an oversampled signal is equivalent to sampling in the first place.

Technology similar to this, with some additional improvements to reduce the amount of math needed, makes it possible to put CD-quality ADCs in every desktop and laptop computer.  Instead of an expensive analog filter, cheap digital gates on an IC provide most of the filtering, reducing the cost of the ADC to only a dollar or two.

Wrapping Up

In this article, we have come full circle to find out how delta-sigma techniques can make analog design easier.  I’ve shown how aliasing happens and explained the need for anti-aliasing filters.  Then we looked at the oversampling inherent to delta-sigma modulators, and how that permits a simpler analog antialiasing filter, at long as a digital low-pass filter is included after the modulator.  This is just one of the reasons why delta-sigma principles are very cool.  Coming up in this series: Simulating a delta-sigma modulator and an introduction to noise shaping.

Reference

Bourdopoulos, George I., Aristodemos Pnevmatikakis, Vassilis Anastassopoulos, and Theodore Deliyannis.  Delta-Sigma Modulators: Modeling, Design and Applications. London: Imperial College Press, 2003

How Delta Sigma Works, part 1: Introducing the Delta Sigma Modulator

This post is part of a series on delta-sigma techniques: analog-to-digital and digital-to-analog converters, modulators, and more. A complete list of posts in the series are in the How Delta-Sigma Works tutorial page.

Today I’d like to turn to the fascinating topic of delta-sigma techniques. Delta-sigma is best known for its use in analog-to-digital and digital-to-analog converters, but it also has a potent role in digital signal processing and even in analog applications. By its nature, delta-sigma can reduce the amount of analog circuitry needed in a radio or other electronics, and what is left is often simpler and cheaper than what would otherwise be required.

Beyond that, delta-sigma techniques are nifty! The core concept is counter-intuitive at first glance, yet it offers all kinds of powerful applications. Working at understanding delta-sigma techniques gives deep insights to many other areas of signal processing.

This is the first of a multi-part series on delta-sigma, which is too broad and deep a topic to cover in a single post. There will be some math, balanced with an intuitive approach to the circuits. I will also delve into the the practical, building delta-sigma data converters and sharing the schematics and results. I will be learning about delta-sigma along with you, so stay tuned for more in future posts.

The place to begin is with a first order delta-sigma modulator, which is the simplest variety of delta-sigma circuit. A first-order modulator has a structure like this:

Abstract first-order delta-sigma modulator

Continue reading How Delta Sigma Works, part 1: Introducing the Delta Sigma Modulator