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Monthly Archives: June 2011
Teaching Electronics to a Preschooler
I was stuck. How do I explain decoupling capacitors to someone who doesn’t know yet what electricity is? I said something garbled about getting rid of the part of the electricity we don’t want. He accepted my explanation, but it bothered me. He wanted to know about electronics, but I didn’t know where to start.
After several wrong turns while searching online, I found Oscar and the Bird, by Geoff Waring. The book was perfect for us.
Oscar, an inquisitive kitten, is surprised one day when he accidentally turns on the windshield wipers in a tractor he is exploring. Continue reading
The iambic keyer core is alive
With just a few tweaks, I brought up the “IambicV” iambic keyer core on one of my A3PN250 breakout boards. I was stunned when it made dits, dahs, and iambic dah-dits perfectly the first time out. Yes, I know that’s what a testbench is supposed to make possible, and yes, I’ve had it happen before, but I still always expect smoke the first time I turn something on.
I made a few changes from last week’s version. Continue reading
Iambic keyer in Verilog
If my goal is to build an FPGA-based ham radio, one of the modules I can’t do without is an iambic keyer. I have to confess that I have never been much of a CW (Morse code) operator, but with so many logic gates available, it would be a shame to leave out a keyer.
Writing an iambic keyer turned out to be a good way to get the kinks out of the FPGA toolchain. The code itself is pretty simple and straightforward. One flip-flop keeps track of whether the current symbol is a dit or a dah. Another tracks whether the paddle for the opposite symbol (dah or dit, respectively) has been pressed during the current symbol. Finally, a two-level counter handles the timing of the dits and dahs and operates the key line. There is a simple sidetone, too. Continue reading
The FPGA level shifter: not entirely crazy!
Some months ago, I came across an Actel app note that advocated using FPGAs as level shifters. “What a crazy waste of computing power,” I thought to myself, “though I suppose they are just trying to sell the low-end ProASIC3 nano FPGAs.” With that, I set the thought aside.
Much later, I ran into a problem. Continue reading
Posted in Design Notes
Tagged A3PN015, design, FPGA, level shifting, radio, SN74AVC4T774
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