A Morse code keyer in VHDL

I found another FPGA Morse code keyer project! This one is written in VHDL by Jim Brady. He has posted the source (for a Xilinx Spartan 3A).  He also posted his vintage keyer designs from the 1960’s and 1970’s.

Jim’s design is not iambic, but does have dot and dash memory. Speed adjustment is done via an RS-232 serial link to a PC.

If VHDL is your hardware language of choice, or if just would like another take on Morse keying, Jim’s keyer is worth a look.  Of course, if you’re interested in a small iambic keyer core in Verilog, have a look at the skywired.net iambic keyer.

Update 8/8/11: Jim tipped me off to another VHDL keyer published online. This one is designed for a Cypress CPLD and is written in VHDL. It’s on pages 53-73 of Circuits I Have Known, by Ronald W. Parker. A PDF is available at controlsignalconverter.com, and the book itself is available at Amazon.

Papilio One Xilinx FPGA breakout board

This week, I came across the Papilio One FPGA board. This intriguing board mounts a Xilinx Spartan 3E, in either the 250K or 500K gate flavor, along with power supplies and an on-board USB programmer.  It’s inexpensive, at $50 for the 250K version and $70 for the 500K version. This would make a good pre-assembled alternative to the Microsemi SOC (née Actel) A3PN250 breakout board I am using.

One really neat feature of the Papilio is that it is designed to be Arduino-compatible! By loading an AVR8 soft core onto the FPGA, Arduino-compatible sketches can run on the board. The board supports a set of connectors to which up to 6 expansion boards (“wings”) can be attached, similar to shields. Its inclusion of a programmer and power supply also imitate the Arduino model.  As well as Arduino programs, the board is also programmable in Verilog and VHDL.

Unlike my board, its off-board connections are through-hole, and it can’t be mounted directly on a ground plane without extra insulation.  I like the philosophy of bringing out a full 48 uncommitted pins to the off-board connectors instead of loading up the board with extras.  Boards with RAMs, flash, and displays are easy to get started with, but end up being confining, making it harder to add external circuitry when the on-board stuff is not enough.

The Papilio is a close relative of the Open Bench Logic Sniffer, designed by Ian Lesnet and Jack Gassett. The Papilio heritage shows in the Logic Sniffer’s two “wing” expansion connectors.

If your FPGA preference is Xilinx or if you want a flexible, basic breakout board with an on-board programmer and power supply, the Papilio is well worth a look.

How Delta-Sigma Works, part 2: The Anti-Aliasing Advantage

This post is part of a series on delta-sigma techniques: analog-to-digital and digital-to-analog converters, modulators, and more. A complete list of posts in the series are in the How Delta-Sigma Works tutorial page.

Today, let’s take another look at delta-sigma conversion.  The first part of this series showed how a one-bit, first-order delta-sigma modulator creates a bitstream, the average value of which equals the input voltage.  It turns out that how we find that average value makes a big difference in the performance of a delta-sigma analog-to-digital converter.  In fact, if done right, not only does it improve performance, but it greatly simplifies the analog circuitry preceding the A-to-D.  Let’s take a look at why this works!

Aliasing Explained

One phenomenon that happens with any analog-to-digital conversion is known as aliasing.  A-to-D is inherently a sampling process, in which an analog signal that is continuous in time is converted to a digital signal that exists in discrete chunks, or samples.  The rate at which those samples are taken is known as the sampling rate.  The figure below shows three analog sine waves, in red, being sampled at the times marked with the blue vertical lines.  The top sine wave has a frequency of 1 Hz, and it is being sampled at 7 Hz.  (The seventh sample is not obvious, because it is zero and the left- hand or the right-hand edge of the graph.  Which edge you choose is unimportant.)

A frequency above the sampling rate results in aliasing to a lower frequency

The second and third plots in the figure show aliasing in action.  When any signal with a frequency above one-half the sampling rate is sampled, the signal is <i>aliased</i> down to a frequency between 0 Hz and one-half the sampling rate.  The second line shows a 6 Hz sine wave in red, which is being sampled at 7 samples per second (sps).  The blue lines show where the samples fall.  Because 6 Hz is above 3.5 sps (one half of 7 sps), the sine wave will be aliased.  As you can see, the blue samples are identical to those you see in the top trace, except that they have the opposite polarity.  The dark blue trace connects them and shows that a 6 Hz sine wave is indistinguishable from a 1 Hz sine wave when both are sampled at 7 sps.  That is aliasing in action.

The same process happens for any input frequency above one-half the sampling rate.  The third plot in the figure, for example, shows an 8 Hz sine wave.  Again, it is sampled at 7 Hz.  This time the samples are identical to those in the top line.  The sampled waveform (in dark blue once again) is indistinguishable from the sampled version of our original 1 Hz sine wave.

Aliasing is so important that one-half the sampling rate has become known as the “Nyquist frequency” for a system.  You may see people refer to signals as being “above Nyquist” or “below Nyquist”.  Aliasing happens in a repeated pattern as the frequency rises, and each repetiion of that pattern is called a “Nyquist zone”.  All of this is in memory of Harry Nyquist (1889-1976), who with Claude Shannon discovered much of the mathematics behind sampling.

Because of aliasing, analog-to-digital converters are usually preceded by an anti-aliasing filter.  This filter removes the frequency content outside of the desired Nyquist zone, so that noise and interfering signals do not alias into the passband of the ADC.  Most often, a low-pass filter is used, so that the selected Nyquist zone runs from DC (0 Hz) to 1/2 the sampling frequency.  There are some exotic RF applications in which a bandpass filter selects frequencies in a higher Nyquist zone, which the ADC then aliases down, but these are uncommon.

An anti-aliasing filter before an ADC input.

How Oversampling Makes Anti-Aliasing Easier

In order to get good accuracy, delta-sigma converters need to run at a much higher frequency than the input signal.  The first part of this series introduced an idea for an ADC built from a delta-sigma modulator followed by a digital counter:

Conceptual delta-sigma analog-to-digital converter

For this to work, the delta-sigma modulator has to <i>oversample</i>.  In order to have the counter reflect the input signal accurately, there have to be many 1 and 0 bits in the modulator’s output for the counter to count.  In other words, each sample from the counter’s output has to reflect many samples in the modulator.  This is called oversampling.

The nice thing about oversampling is that the Nyquist frequency goes up with the sample rate, even when oversampling!  The classic example of this happens in CD audio systems.  CDs carry audio signals of up to 20 kHz, with a 44.1 ksps sample rate and a Nyquist frequency of 22.05 kHz.  Furthermore, CD audio has a dynamic range of about 97 dB.  In order to avoid aliasing signals back into the 0 Hz – 20 kHz audio band, the antialiasing filter at the input of a CD audio ADC needs to have a rolloff frequency (-3 dB) at 20 kHz, and should be down to -97 dB by 24.1 kHz.  This is an impractical filter to design and build.

However, if an oversampled delta-sigma ADC is used, then the Nyquist frequency goes up to one-half the oversampled sample rate.  A typical choice might be 64x oversampling, in which case the ADC will sample at 2.8224 MHz.  Then the Nyquist frequency is 1.4112 MHz.  The anti-aliasing filter still needs to have its -3 dB rolloff at 20 kHz, but it does not need to be -97 dB down until 2.82 MHz.  That is a much easier filter to design.  In fact, a 3-pole filter, easily and cheaply implemented with an op amp, is sufficient.

Moving Anti-Aliasing to the Digital Domain

To go from 2.8 Msps to 44.1 ksps requires another round of sampling, this time in the digital domain.  Remember the counter?  The process of reading its count, then resetting it for another round of counting, is a form of sampling, and aliasing can result.  The figure below shows an example.  In this case, an 8 Hz sine wave is being sampled at 70 sps by an oversampling ADC.  Then, that digital signal is being downsampled, by taking every tenth sample, to 7 sps.  The result is that the 8 Hz input is aliased to 1 Hz, just as if it was sampled at 7 sps in the first place.

Aliasing can result from downsampling a digital signal.

Just as in the analog domain, there are times when the aliasing resulting from downsampling can be useful, but often it is not.  To prevent it, we need a low-pass filter, but this time the filter can be digital.  In the CD-audio example, the filter needs to have the same rolloff characteristics as the challenging analog filter (-3 dB at 20 kHz, and -97 dB at 24.1 kHz).  Doing that in a digital filter, though, is much easier than in analog.  Digital arithmetic can produce a filter of arbitrarily good performance, without the precision components or careful tuning adjustments that might be required in analog.  All it takes is throwing enough logic gates at the problem, and thanks to Moore’s Law, logic gates are cheap.

Since low-pass filters have an averaging effect, the filter will turn the bitstream of 1’s and 0’s into a series of multi-bit samples.  The counter becomes unnecessary.  Instead, it is enough to keep one sample from the low-pass filter’s output every so often, discarding the rest.  The ADC now looks like this.  (A simple anti-aliasing filter before the input is needed, but not shown.)

A delta-sigma ADC with a low pass filter and downsampler

The figure below shows the principle.  A 1 Hz sine wave is oversampled at 70 Hz in the top graph, then 9 out of every 10 samples are discarded, leaving only the highlighted ones.  Those samples are plotted in the bottom graph.  The result is identical to the sine wave samples in the first graph at the top of this article.

Downsampling an oversampled signal is equivalent to sampling in the first place.

Technology similar to this, with some additional improvements to reduce the amount of math needed, makes it possible to put CD-quality ADCs in every desktop and laptop computer.  Instead of an expensive analog filter, cheap digital gates on an IC provide most of the filtering, reducing the cost of the ADC to only a dollar or two.

Wrapping Up

In this article, we have come full circle to find out how delta-sigma techniques can make analog design easier.  I’ve shown how aliasing happens and explained the need for anti-aliasing filters.  Then we looked at the oversampling inherent to delta-sigma modulators, and how that permits a simpler analog antialiasing filter, at long as a digital low-pass filter is included after the modulator.  This is just one of the reasons why delta-sigma principles are very cool.  Coming up in this series: Simulating a delta-sigma modulator and an introduction to noise shaping.

Reference

Bourdopoulos, George I., Aristodemos Pnevmatikakis, Vassilis Anastassopoulos, and Theodore Deliyannis.  Delta-Sigma Modulators: Modeling, Design and Applications. London: Imperial College Press, 2003

A Trip to Electronic Surplus in Cleveland

Yesterday my son and I took a trip to Electronic Surplus, Cleveland Ohio’s candy store for electronics hobbyists and professionals. From a warehouse building in Mentor, ESI operates both a brick-and-mortar store and the website electronicsurplus.com. This is my home-town surplus dealer, which has been a good source for parts for me. Read on to have a look around.

The welcoming sign tells me I’m in the right place. Their location is near a busy intersection, but out of sight of the main roads. An earlier incarnation of the business was known as “Electronic Surplus Inc.”, hence “ESI”. Today the “I” is vestigial — the company is an LLC — but the abbreviation stuck.

The retail store fills about a quarter of the warehouse-style space, with the rest used for storage and web order fulfillment. The store has an odd C-shaped floorplan. This is the view from just inside the front door. The grey drawers contain a variety of parts. The shelves behind them have some of the test equipment that is for sale.

Not far from the counter is a selection of odd circuit boards and modules. This one is a sound and light board from a toy, and next to it is a high voltage supply board. Out of sight to the right was an LM317 power supply board. I was tempted by that, but decided it would be a better idea to use up the ones I already have in my parts collection. Continue reading “A Trip to Electronic Surplus in Cleveland”

Crazy PCB Layout from the Big Hair Decade

Check out the bizarre PCB layout on this power supply.  A Pulse Instruments PI-702, I bought it for a few dollars at a hamfest. It was made in the mid-80’s and plugs into Tektronix TM500-series mainframes. When I powered it up, BANG!, after which it had no output.  Here is what I found when I opened it up for a look:

The curvy, hand-taped traces are typical for the period, but look at how few components are in the two-thirds closest to the front panel compared to the number of pads! Plenty of those pads look like they have an 0.3″ DIP pattern, but have either discretes or nothing soldered to them.  The layout is also full of dead-ends and traces that don’t go anywhere, and there is no silkscreen.  The back third is neat and tidy — it is all a bit Dr. Jekyl and Mr. Hyde.

All of this leaves me wondering what the crazy layout is for! If it is meant to dissuade reverse-engineering, it might work (it worked for me, so far…), but who would want to protect something as simple as a linear power supply? It is even stranger that the digital-to-analog conversion circuitry near the edge connector gets so little of the board, and is laid out quite cleanly compared to the power supply.  I suppose that this might be a case of multiple models using a single PCB, but what a devious mind it would take to merge multiple schematics into something that looks like this!

The problem itself was easy enough to find. One electrolytic capacitor dried out and blew up. You can see it at the lower-left of the second photo. It will be easy to fix, assuming it didn’t take any other components with it.

The device itself is interesting.  It has three outputs, two of which are bipolar, each covering -25 V to +25 V continuously. They can be independently set with front panel controls, track an external input, or be controlled digitally. The bipolar outputs are limited to a wimpy 25 mA each, which is undoubtedly why it is called a bias supply. It also has a fixed +5 V output at up to 0.5 A.

Now I know that the 80’s were not only the decade of MTV and big hair, but at least one rather strange PCB layout.

Teaching Electronics to a Preschooler

I was stuck. How do I explain decoupling capacitors to someone who doesn’t know yet what electricity is? I said something garbled about getting rid of the part of the electricity we don’t want. He accepted my explanation, but it bothered me. He wanted to know about electronics, but I didn’t know where to start.

After several wrong turns while searching online, I found Oscar and the Bird, by Geoff Waring. The book was perfect for us.

Oscar, an inquisitive kitten, is surprised one day when he accidentally turns on the windshield wipers in a tractor he is exploring.

Oscar and the Bird: A Book About Electricity
Geoff Waring
Candlewick Press, 2008

“Will you show me something, Daddy?” asked my three year old son as he padded down the basement stairs and scampered to my workbench.  Forever wanting to know how things work, he likes to sit on my lap and look through my magnifier lamp at whatever is on hand.

On hand that day was my NorCal 40A.  I popped open the clasps on the lid and opened it up, and the questions began.

“What’s that, Daddy?”  He pointed to an LM393 op amp.

“It’s an amplifier. It makes things louder.”

Then we got into dangerous territory.

“What are those, Daddy?”

“What are what?”

“The blue things.”

“Oh! Those are capacitors.”

“What do they do?”

I was stuck.  How do I explain decoupling capacitors to someone who doesn’t know yet what electricity is?  I said something garbled about getting rid of the part of the electricity we don’t want.  He accepted my explanation, but it bothered me.  He wanted to know about electronics, but I didn’t know where to start. Continue reading “Teaching Electronics to a Preschooler”

The iambic keyer core is alive

With just a few tweaks, I brought up the “IambicV” iambic keyer core on one of my A3PN250 breakout boards. I was stunned when it made dits, dahs, and iambic dah-dits perfectly the first time out. Yes, I know that’s what a testbench is supposed to make possible, and yes, I’ve had it happen before, but I still always expect smoke the first time I turn something on.

I made a few changes from last week’s version.

With just a few tweaks, I brought up the “IambicV” iambic keyer core on one of my A3PN250 breakout boards. I was stunned when it made dits, dahs, and iambic dah-dits perfectly the first time out. Yes, I know that’s what a testbench is supposed to make possible, and yes, I’ve had it happen before, but I still always expect smoke the first time I turn something on.

I made a few changes from last week’s version. One change was to invert the dit and dah pins. Although high-true logic is convenient within the keyer module, it seems like a good idea to have the actual paddles grounded, so the inputs had to be low-true. The physical constraints file enables the built-in pull-up resistors on the dit and dah pins.

For an audio amplifier, I used an old Saint Louis QRP Society LM380 board.

It’s all lashed together on my bench, but it works.

To download the core, see the iambic keyer project page.